A Robust Low-Voltage On-Chip LDO Voltage Regulator in 180 nm | Zendy

Sreehari Rao Patri | Zendy; K. S. R. Krishna Prasad | Zendy

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A Robust Low-Voltage On-Chip LDO Voltage Regulator in 180 nm

Author(s) -

Sreehari Rao Patri,

K. S. R. Krishna Prasad

Publication year - 2008

Publication title -

vlsi design

Language(s) - English

Resource type - Journals

eISSN - 1065-514X

pISSN - 1026-7123

DOI - 10.1155/2008/259281

Subject(s) - low dropout regulator , dropout voltage , voltage regulator , voltage , transient response , transient (computer programming) , capacitor , regulator , materials science , process corners , control theory (sociology) , voltage drop , electronic engineering , electrical engineering , engineering , computer science , chemistry , biochemistry , control (management) , artificial intelligence , gene , operating system

This paper proposes a capacitor-less LDO with improved steady-state response and reduced transient overshoots and undershoots. The novelty in this approach is that the regulation is improved to a greater extent by the improved error amplifier in addition to improved transient response against five vital process corners. Also entire quiescent current required is kept below 100 A. This LDO voltage regulator provides a constant 1.2 V output voltage against all load currents from zero to 50 mA with a maximum voltage drop of 200 mV. It is designed and tested using Spectre, targeted to be fabricated on UMC 180 nm

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