On SPARC LEON-2 ISA Extensions Experiments for MPEG Encoding Acceleration | Zendy

Pierre Guironnet de Massas | Zendy; PierreOlivier Amblard | Zendy; Frédéric Pétrot | Zendy

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On SPARC LEON-2 ISA Extensions Experiments for MPEG Encoding Acceleration

Author(s) -

Pierre Guironnet de Massas,

PierreOlivier Amblard,

Frédéric Pétrot

Publication year - 2007

Publication title -

vlsi design

Language(s) - English

Resource type - Journals

eISSN - 1065-514X

pISSN - 1026-7123

DOI - 10.1155/2007/28686

Subject(s) - computer science , speedup , coprocessor , encoding (memory) , integer (computer science) , set (abstract data type) , instruction set , parallel computing , computation , computer architecture , acceleration , compression (physics) , mmx , data compression , computer engineering , algorithm , programming language , artificial intelligence , physics , materials science , classical mechanics , composite material

This paper presents the necessary steps to modify the implementation of the SPARCV8 architecture to enhance it with multimedia-oriented instructions. The purpose is improving video compression performance without designing dedicatedcoprocessors. We investigate the complexity of modifying a standard processor instruction set and show that, although not trivial, this is feasible in a few weeks. Weimplemented 12 new instructions and use some of them to optimize the computationof a demanding step of the MPEG encoding. The result is a performance increase of 67% in the execution of a part of this algorithm, allowing us to expect a 30% speedup in the execution of an MPEG video compression. The area increase of the integer unit is about 18% and the clock frequency is not significantly modified in an LEON-2 implementing 6 among 12 of the new instructions

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