Exploiting Data-dependencies in Ultra Low-power DSP Arithmetic | Zendy

V.A. Bartlett | Zendy; Eckhard Grass | Zendy

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Exploiting Data-dependencies in Ultra Low-power DSP Arithmetic

Author(s) -

V.A. Bartlett,

Eckhard Grass

Publication year - 2000

Publication title -

vlsi design

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.123

H-Index - 24

eISSN - 1065-514X

pISSN - 1026-7123

DOI - 10.1155/2001/94037

Subject(s) - operand , asynchronous communication , multiplier (economics) , computer science , energy consumption , computation , efficient energy use , arithmetic , digital signal processing , parallel computing , algorithm , computer hardware , mathematics , engineering , electrical engineering , economics , macroeconomics , computer network

Strategies for the design of ultra low power multipliers and multiplier-accumulators are reported. These are optimized for asynchronous applications being able to take advantage of data-dependent computation times. Nevertheless, the low power consumption can be obtained in both synchronous and asynchronous environments. Central to the energy efficiency is a dynamic-logic technique termed Conditional Evaluation which is able to exploit redundancies within the carry-save array and deliver energy consumption which is also heavily data-dependent.

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