Low Power Design for ASIC Cores | Zendy

Alvar Dean | Zendy; David Garrett | Zendy; Mircea R. Stan | Zendy; Sebastian Ventrone | Zendy

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Low Power Design for ASIC Cores

Author(s) -

Alvar Dean,

David Garrett,

Mircea R. Stan,

Sebastian Ventrone

Publication year - 2000

Publication title -

vlsi design

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.123

H-Index - 24

eISSN - 1065-514X

pISSN - 1026-7123

DOI - 10.1155/2001/90464

Subject(s) - application specific integrated circuit , power (physics) , power gating , electronic engineering , clock gating , engineering , digital signal processing , electrical engineering , computer science , embedded system , voltage , electronic circuit , clock signal , transistor , synchronous circuit , physics , quantum mechanics

A semicustom ASIC design methodology is used to develop a low power DSP core formobile (battery powered) applications. Different low power design techniques are used,including dual voltage, low power library elements, accurate power reporting, pseudomicrocode,transition-once logic, clock gating, and others

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