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Current mobile phone applications demand high performance from the DSP, and futuregenerations are likely to require even greater throughput. However, it is important tobalance these processing demands against the requirement of low power consumptionfor extended battery lifetime. A novel low-power digital signal processor (DSP)architecture CADRE (Configurable Asynchronous DSP for Reduced Energy) addressesthese requirements through a multi-level power reduction strategy. A parallel architectureand configurable compressed instruction set meets the throughput requirementswithout excessive program memory bandwidth, while a large register file reduces thecost of data accesses. Sign-magnitude representation is used for data, to reduce switchingactivity within the datapath. Asynchronous design gives fine-grained activity controlwithout the complexities of clock gating, and gives low electromagnetic interference.Finally, the operational model of the target application allows for a reduced interruptstructure, simplifying processor design by avoiding the need for exact exceptions

CADRE: A Low-power, Low-EMI DSP Architecture for Digital Mobile Phones