3D Modelling of Fluctuation Effects in Highly Scaled VLSI Devices | Zendy

T. Linton | Zendy; Shaofeng Yu | Zendy; R. Shaheed | Zendy

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3D Modelling of Fluctuation Effects in Highly Scaled VLSI Devices

Author(s) -

T. Linton,

Shaofeng Yu,

R. Shaheed

Publication year - 2001

Publication title -

vlsi design

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.123

H-Index - 24

eISSN - 1065-514X

pISSN - 1026-7123

DOI - 10.1155/2001/43502

Subject(s) - very large scale integration , reliability (semiconductor) , silicon on insulator , electronic engineering , leakage (economics) , soft error , threshold voltage , chip , capacitance , enhanced data rates for gsm evolution , materials science , scaling , computer science , voltage , electrical engineering , engineering , optoelectronics , transistor , physics , silicon , telecommunications , power (physics) , geometry , electrode , quantum mechanics , mathematics , economics , macroeconomics

Fluctuation effects are becoming important in advanced VLSI devices because of theirincreasing impact on circuit performance and chip yields. Accurate modelling of theseeffects generally requires full 3D simulation, which is used here to analyse four of theprimary such effects. Polysilicon line edge roughness causes excess device leakage, whichcan be reduced at the cost of decreased performance. Phase-shift mask defects canreduce current drive and increase capacitance. Random dopant fluctuation, whichcauses variation in threshold voltage, is evaluated for three technology generations andit is shown that proper tip scaling can reduce these variations. Finally, a study of alphaparticle strikes evaluates the effectiveness of SOI in improving soft error reliability

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