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Recently a multiple-sequence test generator was presented based on two-dimensionallinear feedback shift registers (2-D LFSR). This generator can generate a set of precomputedtest vectors obtained by an ATPG tool for detecting random-pattern-resistantfaults and particular hard-to-detect faults. In addition, it can generate better randompatterns than a conventional LFSR. In this paper we describe an optimized BIST schemewhich has a configurable 2-D LFSR structure. Starting from a set of stuck-at faults anda corresponding set of test vectors detecting these faults, the corresponding test patterngenerator is determined automatically. A synthesis procedure of designing this testgenerator is presented. Experimental results show that the hardware overhead is considerablyreduced compared with 2-D LFSR generators

Configurable 2-D Linear Feedback Shift Registers for VLSI Built-in Self-test Designs