Open AccessConfigurable 2-D Linear Feedback Shift Registers for VLSI Built-in Self-test Designs
Author(s) -
ChienIn Henry Chen,
Yingjie Zhou
Publication year - 1999
Publication title -
vlsi design
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.123
H-Index - 24
eISSN - 1065-514X
pISSN - 1026-7123
DOI - 10.1155/2000/60904
Subject(s) - linear feedback shift register , shift register , generator (circuit theory) , built in self test , overhead (engineering) , set (abstract data type) , automatic test pattern generation , test set , computer science , sequence (biology) , algorithm , very large scale integration , fault coverage , digital pattern generator , computer hardware , parallel computing , embedded system , engineering , electronic circuit , artificial intelligence , power (physics) , electrical engineering , programming language , telecommunications , chip , physics , quantum mechanics , biology , genetics
Recently a multiple-sequence test generator was presented based on two-dimensionallinear feedback shift registers (2-D LFSR). This generator can generate a set of precomputedtest vectors obtained by an ATPG tool for detecting random-pattern-resistantfaults and particular hard-to-detect faults. In addition, it can generate better randompatterns than a conventional LFSR. In this paper we describe an optimized BIST schemewhich has a configurable 2-D LFSR structure. Starting from a set of stuck-at faults anda corresponding set of test vectors detecting these faults, the corresponding test patterngenerator is determined automatically. A synthesis procedure of designing this testgenerator is presented. Experimental results show that the hardware overhead is considerablyreduced compared with 2-D LFSR generators
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