Signal Coding and CMOS Gates for Combinational Functional Blocks of Very Deep Submicron Self-checking Circuits
Author(s) -
Cecilia Metra,
M. Favalli,
B. Riccò
Publication year - 1999
Publication title -
vlsi design
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.123
H-Index - 24
eISSN - 1065-514X
pISSN - 1026-7123
DOI - 10.1155/2000/42016
Subject(s) - combinational logic , cmos , electronic circuit , computer science , electronic engineering , transistor , logic gate , engineering , electrical engineering , voltage
In this paper we propose signal coding and CMOS gates that are suitable to self-checking circuits with combinational functional blocks implemented also by next generation, very deep submicron technology. In particular, our functional blocks satisfy the Strongly Fault-Secure property with respect to a wide set of possible, internal faults including not only conventional stuck-ats, but also transistor stuck-ons, transistor stuck-opens, resistive bridgings, delays, crosstalks and transient faults, that are very likely to affect next generation ICs. Compared to alternative, existing solutions, that proposed here does not imply any critical constraint on the circuit electrical parameters. Therefore, it is suitable to be adopted to design very deep submicron self-checking circuits which, compared to todays' circuits, will present significantly increased sensitivity to parameter variations occurring during fabrication.
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