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A VLSI implementation of a dedicated digital signal processor is presented. Theprocessor is tailored for efficient implementation of transform domain adaptive filters. Itincorporates a butterfly processor which performs butterfly operation to implement therequired transformation. It is also able to perform complex addition, subtraction andmultiplication. The butterfly processor makes use of a redundant binary tree multiplierwith a recently proposed coding of signed-digit numbers which reduces the number oflevels in the tree by one. An on-chip read only memory holds the transformationcoefficients. The contents of the ROM determine the type of transform. The processorincorporates an ALU to perform integer arithmetic, address calculations andimplementation of circular memory scheme. For fastest accessibility, the essentialvariables of the algorithm are implemented in a register fire

A VLSI Design for Implementation of Transform Domain Adaptive Filters