Placement with Incomplete Data

Traditional placement problems are studied under a fully specified cell library and acomplete netlist. However, in the first, e.g., 2 years of a 2 – 3 year microprocessor designcycle, the detailed netlist is unavailable. For area and performance estimation, layoutmust nevertheless be done with incomplete information. Another source of incompletenesscomes from logic synthesis changes; some instances and their parameters will changeas the project evolves. In the re-configurable computing area, sometimes we need toperform quick placement before all information is available. The problem of placementwith incomplete data (PID) can be abstracted as having to place a circuit when pc% of the cells and pn% of the nets are missing. The key challenge in PID is how to add missingcells and nets