Investigation of Various Mesh Architectures With Broadcast Buses for High-Performance Computing

Extensive comparative analysis is carried out of various mesh-connected architecturesthat contain sparse broadcast buses for low-cost, high-performance parallel computing.The two basic architectures differ in the implementation of bus intersections. The firstarchitecture simply allows row/column bus crossovers, whereas the second architectureimplements such intersections with switches that introduce further flexibility. Botharchitectures have lower cost than the mesh with multiple broadcast, which has busesspanning each row and each column, but the former architectures maintain to highextent the powerful properties of the latter mesh. The architecture that employs switchesfor the creation of separable buses is even shown to often perform better than thehigher-cost mesh with multiple broadcast. Architectures with separable buses thatemploy store-and-forward routing often perform better than architectures withcontiguous buses that employ the high-cost wormhole routing technique. Thesearchitectures are evaluated in reference to cost, and efficiency in implementing severalimportant operations and application algorithms. The results prove that thesearchitectures are very promising alternatives to the mesh with multiple broadcast whiletheir implementation is cost-effective and feasible