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Recent Advances in Device Simulation Using Standard Transport Models
Author(s) -
G. Baccarani,
M. Rudan,
M. Lorenzini,
Carme Sala
Publication year - 1998
Publication title -
vlsi design
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.123
H-Index - 24
eISSN - 1065-514X
pISSN - 1026-7123
DOI - 10.1155/1998/48951
Subject(s) - eeprom , microelectronics , computer science , polygon mesh , discretization , flash (photography) , quantum tunnelling , electronic engineering , embedded system , simulation , engineering , electrical engineering , materials science , optoelectronics , art , mathematical analysis , computer graphics (images) , mathematics , visual arts
In this paper we address a number of issues related with device simulation in 3-D, and pointout a few deficiencies which still prevent 3-D device simulation to be widely accepted as astandard tool for device design and optimization in an engineering environment. More specifically,such deficiencies have to do with structure definition and mesh generation, as well aswith the computational burden which is typically associated with discretization meshes featuring50.000 nodes or more. Next, we address the problem of validating advanced physicalmodels in 3-D by means of our device simulator HFIELDS-3D and use a flash-EEPROM cellmanufactured at ST-Microelectronics as a test vehicle for the validation of hot-carrier injectioninto the floating gate and Fowler-Nordheim tunneling across the gate oxide

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