On Self-Checking Design of CMOS Circuits for Multiple Faults

A technique for designing totally self-checking (TSC) FCMOS (Fully ComplementaryMOS) designs for multiple faults is presented in this paper. The existing techniques forself checking design consider only single faults, and suffer from high silicon areaoverhead. The multiple faults considered in this paper are multiple breaks, multipletransistors stuck-offs and multiple transistors stuck-ons. Starting from FCMOS design,small modifications (addition of two-weak transistors) make the original circuit totallyself-checking. Experiemntal results show the overhead, delay and power consumptionfor the proposed technique. This paper also presents a technique for designingmultistage TSC FCMOS circuits