Advancements in Power Supply Current Testing

As far back as the 1970’s, the microelectronics test industry discovered a correlation between CMOS IC defects and the behavior of the power supply current. Companies utilized the premise that an IC exhibiting unusually high quiescent power supply current (IDDQ) levels is likely to be defective. They found that IDDQ can be especially useful in detecting defects in static CMOS circuits. The IDDQ in static CMOS circuits is a function of normal circuit leakages and is thus, normally, very low because the circuit has no direct path between PWR and Ground in the quiescent state. Defects which cause excessive leakage into the power supply bus can be detected by observing the resulting high IDDQ level. This simple technique grew in popularity because the power supply current is directly observable and can be used to detect defects that may not alter the logic behavior of the IC and could thus go undetected under logic testing. Such defects include gate-oxide shorts, double floating gate faults, defects which cause partially conducting (weak) transistors, and bridging faults. Tests are generated such that a path is established between PWR and Ground causing an elevated IDDQ. For example, in the case of bridging faults, a path is established between PWR and GND via the bridged nodes. Over the past decade, the research community has extensively studied IDDQ testing which resulted in a wealth of knowledge and numerous publications. The principal research issues include: finding a limiting value to IDDQ during testing (above which an IC is characterized as faulty), developing efficient built-in current (BIC) sensors to speed-up the test process, developing test pattern generation strategies and algorithms, developing techniques for designing IDDQ testable circuits vis-a-vis partitioning for BIC sensor insertion, efficiently integrating IDDQ with other test strategies such as logic testing, and data collection for reliability studies. More recently, researchers have extended the idea of IDDQ to the transient portion of the power supply current. The principle is that both the quiescent and transient portions of the supply current carry important pieces of information that can be used to detect defects and improve IC quality. This issue of the journal of VLSI Design presents both new approaches to power supply current testing and additional data on IDDQ testing. The following notation is used throughout this special issue