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VLSI Testing for High Reliability: Mixing IDDQ Testing With Logic Testing
Author(s) -
S. Hwang,
R. Rajsuman
Publication year - 1997
Publication title -
vlsi design
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.123
H-Index - 24
eISSN - 1065-514X
pISSN - 1026-7123
DOI - 10.1155/1997/59329
Subject(s) - algorithm , computer science , artificial intelligence
In this paper, we examine the effectiveness of combined logic and IDDQ testing to detectstuck-at and bridging faults. The stuck-at faults are detected by the logic test and IDDQtesting detects bridging faults

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