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In this paper, we examine the effectiveness of combined logic and IDDQ testing to detectstuck-at and bridging faults. The stuck-at faults are detected by the logic test and IDDQtesting detects bridging faults

vlsi design

VLSI Testing for High Reliability: Mixing <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mrow><mml:msub><mml:mi>I</mml:mi><mml:mrow><mml:mi>D</mml:mi><mml:mi>D</mml:mi><mml:mi>Q</mml:mi></mml:mrow></mml:msub></mml:mrow></mml:math> Testing With Logic Testing

VLSI Testing for High Reliability: Mixing IDDQ Testing With Logic Testing