Improving Path Sensitizability of Combinational Circuits | Zendy

Bhanu Kapoor | Zendy; Vivek Nair | Zendy

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Improving Path Sensitizability of Combinational Circuits

Author(s) -

Bhanu Kapoor,

Vivek Nair

Publication year - 1994

Publication title -

vlsi design

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.123

H-Index - 24

eISSN - 1065-514X

pISSN - 1026-7123

DOI - 10.1155/1996/61747

Subject(s) - benchmark (surveying) , combinational logic , path (computing) , electronic circuit , algorithm , computer science , critical path method , mathematics , logic gate , engineering , electrical engineering , geodesy , systems engineering , geography , programming language

The problem of modifying a synthesized circuit to improve its path sensitizability has beeninvestigated. It is shown that a large number of paths, that cannot be sensitized using single-transitiontests, are redundant paths and they can be removed by appropriate modification ofthe circuit. The effect of these modifications on area and performance of the circuit has beenanalyzed. For the paths which are neither redundant nor sensitizable using single-transitiontests, it is shown that they can be sensitized using multiple-transition tests. Results obtainedon some common benchmark examples suggest the validity and viability of this approach

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