Zener Zap Anti-Fuse Trim in VLSI Circuits | Zendy

Donald T. Comer | Zendy

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Zener Zap Anti-Fuse Trim in VLSI Circuits

Author(s) -

Donald T. Comer

Publication year - 1995

Publication title -

vlsi design

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.123

H-Index - 24

eISSN - 1065-514X

pISSN - 1026-7123

DOI - 10.1155/1996/23706

Subject(s) - trim , fuse (electrical) , zener diode , computer science , cmos , electronic engineering , process (computing) , documentation , very large scale integration , electronic circuit , engineering , electrical engineering , voltage , transistor , programming language , operating system

This paper presents an overview of Zener zap anti-fuse trim as used to achieve improvedaccuracy in precision integrated circuits. Because this technology spans design and manufacturing,elements of design, layout, processing, and testing are included. The mechanism isdefined and typical applications are discussed. Layout considerations of anti-fuse devices aresummarized and complex trim networks and multiplexed control methods are presented.Both bipolar and CMOS process implementations are considered. The paper also contains abibliography which includes U.S. patents, which make up a large part of the technicaldocumentation of this technology

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