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A formal approach for the transformation of computation intensive digital signal processing algorithms intosuitable array processor architectures is presented. It covers the complete design flow from algorithmic specificationsin a high-level programming language to architecture descriptions in a hardware description language. Thetransformation itself is divided into manageable design steps and implemented in the CAD-tool DECOMP whichallows the exploration of different architectures in a short time. With the presented approach data independentalgorithms can be mapped onto array processor architectures. To allow this, a known mapping methodology forarray processor design is extended to handle inhomogeneous dependence graphs with nonregular data dependences.The implementation of the formal approach in the DECOMP is an important step towards designautomation for massively parallel systems

Stepwise Transformation of Algorithms into Array Processor Architectures by the DECOMP