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TOPS: A Target-Oriented Partial Scan Design Package Based on Simulated Annealing
Author(s) -
C.P. Ravikumar,
Haroon Rasheed
Publication year - 1993
Publication title -
vlsi design
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.123
H-Index - 24
eISSN - 1065-514X
pISSN - 1026-7123
DOI - 10.1155/1994/32902
Subject(s) - tops , simulated annealing , computer science , algorithm , engineering , mechanical engineering , spinning
In this paper, we describe algorithms based on Simulated Annealing for selecting a subset of flip-flops to beconnected into a scan path. The objective for selection is to maximize the coverage of faults that are aborted bya sequential fault simulator. We pose the problem as a combinatorial optimization, and present a heuristic algorithmbased on Simulated Annealing. The SCOAP testability measure is employed to assess the selection of flip-flopsduring the course of optimization. Our algorithms form a part of an integrated design package, TOPS, which hasbeen designed as an enhancement to the OASIS standard-cell design automation system available from MCNC.We discuss the TOPS package and its performance on a number of ISCAS'89 benchmarks. We also present acomparative evaluation of the benchmark results

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