Open AccessImpact of Gate Dielectric in Carrier Mobility in Low Temperature Chalcogenide Thin Film Transistors for Flexible Electronics
Author(s) -
Ana L. Salas-Villaseñor,
I. Mejía,
J. Hovarth,
Husam N. Alshareef,
D. K.,
R. Ramı́rez-Bon,
Bruce E. Gnade,
Manuel Quevedo-López
Publication year - 2010
Publication title -
electrochemical and solid-state letters
Language(s) - English
Resource type - Journals
eISSN - 1944-8775
pISSN - 1099-0062
DOI - 10.1149/1.3456551
Subject(s) - materials science , thin film transistor , optoelectronics , gate dielectric , threshold voltage , transistor , thin film , shadow mask , dielectric , annealing (glass) , electron mobility , flexible electronics , nucleation , chalcogenide , nanotechnology , layer (electronics) , voltage , electrical engineering , composite material , optics , engineering , chemistry , physics , organic chemistry
Cadmium sulfide thin film transistors were demonstrated as the n-type device for use in flexible electronics. CdS thin films were deposited by chemical bath deposition (70° C) on either 100 nm HfO2 or SiO2 as the gate dielectrics. Common gate transistors with channel lengths of 40-100 μm were fabricated with source and drain aluminum top contacts defined using a shadow mask process. No thermal annealing was performed throughout the device process. X-ray diffraction results clearly show the hexagonal crystalline phase of CdS. The electrical performance of HfO 2 /CdS -based thin film transistors shows a field effect mobility and threshold voltage of 25 cm2 V-1 s-1 and 2 V, respectively. Improvement in carrier mobility is associated with better nucleation and growth of CdS films deposited on HfO2. © 2010 The Electrochemical Society
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