Crystallographic Silicon-Etching for Ultra-High Aspect-Ratio FinFET

The fabrication process for the FinFET with ultra-high fin-height to fin-width aspect-ratio is presented. The processing is based on the crystallographic etching of (110) bulk silicon-wafers by TMAH to expose the vertical (111) planes. The nitride-spacers are used as the hard-mask for the fin-etching and the fins are isolated by the planarization and etch-back of the thick isolation oxide. The demonstration devices exhibit nearly ideal S of 62-64 mV/dec and DIBL of 10 mV/V or lower, for the gate-length of 410 nm and the height of the active part of the fin of 400 nm. The output current is limited by the large series resistances for both pFETs and nFETs, and additionally by the gate-depletion in nFETs, but large currents per fin, above 30 ?A for pFET are achieved due to tall fin-structure