Open AccessSystem level interconnect design for network-on-chip using interconnect IPs
Author(s) -
Jian Liu,
Meigen Shen,
LiRong Zheng,
Hannu Tenhunen
Publication year - 2003
Publication title -
citeseer x (the pennsylvania state university)
Language(s) - Uncategorized
Resource type - Conference proceedings
DOI - 10.1145/639952.639953
Subject(s) - bottleneck , interconnection , computer science , network on a chip , bandwidth (computing) , computer architecture , scheme (mathematics) , electronic engineering , system on a chip , embedded system , engineering , computer network , mathematical analysis , mathematics
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