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Field programmable gate array (FPGA) makes rapid prototypingan easier task, and is useful in many applicationsdue to its growing speed and capacity. In this paper,we present a rectification method for look-up table typeFPGA's. Instead of changing the netlist of a circuit, weonly modify functionality realized by look-up tables andkeep the netlist equal so that there will be no change onthe delay of the circuit. We formalize the problem usingcharacteristic functions and present a redesign ...

Rectification method for lookup-table type FPGA's