Configuring multiple scan chains for minimum test time

To reduce the high test time for serial scan designs, the use of multiple scan chains has been proposed. In this paper we consider the problem of optimally constructing multiple scan chains so as to minimize overall test time. Rather than follow the traditional practice of using equal length chains, we allow the chains to be of different lengths, and show that this can lead to lower test times. The main idea in our approach is to assign those scan elements that are more frequently accessed to shorter scan chains. Given a design with N scan elements, and given that k scan chains are to be used for applying tests, we present an algorithm of complexity 0(kN2) for configuring the chains such that the overall test application time is minimized. By analyzing a range of circuit topologies, we demonstrate test time reductions as large as 40% over equal length chain configurations.