A modified approach to data cache management

Modern high-performance microprocessors are devoting more and more resources to the problem of the von Neuman bottleneck. In this limit study, we measure the bare minimum amount of local memories that programs require to run without delay. Our measurements are made by using the Value Reuse Profile, which contains the dynamic value reuse information of a program's execution, and by assuming the existence of efficient memory systems. The results show that the group of 16 benchmarks we use require considerably less memory than a typical superscalar microprocessor has. We also measure the amount of performance improvement that is possible in the presence of an autonomous memory system. For the DEC Alpha 21064, this figure ranges from 15% to 102%. The results provide motivation for the development of more effective memory management policies.