An FPGA-based implementation of the Pomaranch stream cipher

As the versatility of small, low power devices increases and their use becomes commonplace, a need for secure communications among these devices has arisen. Pomaranch is a recently developed stream cipher with two major advantages: (i) the low hardware complexity, which results in small area and (ii) the good statistical properties. This architecture supports an 80-bit key and 32- to 108-bit IV. FPGA devices were used for the performance demonstration. A maximum throughput equal to 279 Mbps can be achieved, with a clock frequency of 279 MHz.