Implementation of the Smith-Waterman algorithm on a reconfigurable supercomputing platform
Author(s) -
Peiheng Zhang,
Guangming Tan,
Guang R. Gao
Publication year - 2007
Publication title -
citeseer x (the pennsylvania state university)
Language(s) - English
Resource type - Conference proceedings
DOI - 10.1145/1328554.1328565
Subject(s) - computer science , pipeline (software) , coprocessor , field programmable gate array , supercomputer , parallel computing , reconfigurable computing , exploit , vectorization (mathematics) , arm architecture , performance improvement , simd , embedded system , implementation , key (lock) , computer architecture , speedup , operating system , operations management , computer security , programming language , economics
An innovative reconfigurable supercomputing platform -- XD1000 is developed by XtremeData Inc. to exploit the rapid progress of FPGA technology and the high-performance of Hyper-Transport interconnection. In this paper, we present the implementations of the Smith-Waterman algorithm for both DNA and protein sequences on the platform. The main features include: (1) we bring forward a multistage PE (processing element) design which significantly reduces the FPGA resource usage and hence allows more parallelism to be exploited; (2) our design features a pipelined control mechanism with uneven stage latencies -- a key to minimize the overall PE pipeline cycle time; (3) we also put forward a compressed substitution matrix storage structure, resulting in substantial decrease of the on-chip SRAM usage. Finally, we implement a 384-PE systolic array running at 66.7MHz, which can achieve 25.6GCUPS peak performance. Compared with the 2.2GHz AMD Opteron host processor, the FPGA coprocessor speedups 185X and 250X respectively.
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