Design methodology for IRA codes

Channel coding is an important building block in communication systems since it ensures the quality of service. Irregular repeat-accumulate (IRA) codes belong to the class of Low-Density Parity-Ceck (LDPC) codes and even outperform the recently introduced Turbo-Codes of current communication standards. IRA codes can be represented by a Tanner graph with arbitrary connections between nodes of given degrees. The implementation complexity of an IRA decoders is dominated by the randomness of these connections.In this paper we present for the first time an IRA decoder architecture which can process any given IRA code. We developed a joint graph-decoder design methodology to construct the Tanner graph of a given IRA code which can be efficiently processed by this decoder architecture without any RAM access conflicts. We show that these constructed IRA codes can outperform the UMTS Turbo-Codes.