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Electrically driven monolithic subwavelength plasmonic interconnect circuits
Author(s) -
Yang Liu,
Jiasen Zhang,
Huaping Liu,
Sheng Wang,
LianMao Peng
Publication year - 2017
Publication title -
science advances
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 5.928
H-Index - 146
ISSN - 2375-2548
DOI - 10.1126/sciadv.1701456
Subject(s) - interconnection , plasmon , electronic circuit , optoelectronics , materials science , nanotechnology , computer science , telecommunications , electrical engineering , engineering
In the post-Moore era, an electrically driven monolithic optoelectronic integrated circuit (OEIC) fabricated from a single material is pursued globally to enable the construction of wafer-scale compact computing systems with powerful processing capabilities and low-power consumption. We report a monolithic plasmonic interconnect circuit (PIC) consisting of a photovoltaic (PV) cascading detector, Au-strip waveguides, and electrically driven surface plasmon polariton (SPP) sources. These components are fabricated from carbon nanotubes (CNTs) via a CMOS (complementary metal-oxide semiconductor)–compatible doping-free technique in the same feature size, which can be reduced to deep-subwavelength scale (~λ/7 to λ/95, λ = 1340 nm) compared with the 14-nm technique node. An OEIC could potentially be configured as a repeater for data transport because of its “photovoltaic” operation mode to transform SPP energy directly into electricity to drive subsequent electronic circuits. Moreover, chip-scale throughput capability has also been demonstrated by fabricating a 20 × 20 PIC array on a 10 mm × 10 mm wafer. Tailoring photonics for monolithic integration with electronics beyond the diffraction limit opens a new era of chip-level nanoscale electronic-photonic systems, introducing a new path to innovate toward much faster, smaller, and cheaper computing frameworks.

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