Industrial characterization of scatterometry for advanced APC of 65 nm CMOS logic gate patterning | Zendy

K. Dabertrand | Zendy; Mathieu Touchet | Zendy; Stephanie Kremer | Zendy; C. Chaton | Zendy; Maxime Gatefait | Zendy; Enrique Aparicio | Zendy; Marco Polli | Zendy; Jean-Claude Royer | Zendy

AI Assistant Blog Pricing

Home ZAIA Blog

Open Access

Industrial characterization of scatterometry for advanced APC of 65 nm CMOS logic gate patterning

Author(s) -

K. Dabertrand,

Mathieu Touchet,

Stephanie Kremer,

C. Chaton,

Maxime Gatefait,

Enrique Aparicio,

Marco Polli,

Jean-Claude Royer

Publication year - 2008

Publication title -

proceedings of spie, the international society for optical engineering/proceedings of spie

Language(s) - English

Resource type - Conference proceedings

SCImago Journal Rank - 0.192

H-Index - 176

eISSN - 1996-756X

pISSN - 0277-786X

DOI - 10.1117/12.771614

Subject(s) - critical dimension , photolithography , stack (abstract data type) , materials science , lithography , characterization (materials science) , resist , cmos , etching (microfabrication) , metrology , wafer , process window , optoelectronics , metal gate , logic gate , electronic engineering , nanotechnology , computer science , optics , electrical engineering , engineering , gate oxide , transistor , layer (electronics) , physics , voltage , programming language

The content you want is available to Zendy users.

Already have an account? Click here to sign in.

Having issues? You can contact us here

Accelerating Research