A hardware projector/backprojector pair for 3D PET reconstruction

International audienceForward and Backward projections are two computational costly steps in tomography image reconstruction such as Positron Emission Tomography (PET). To speed-up reconstruction time, a hardware projection/backprojection pair has been built following algorithm architecture adequacy principles. Thanks to an original memory access strategy based on an 3D adaptive and predictive memory cache, the external memory wall has been overcome. Thus, for both projector architectures several units run efficiently. Each unit reaches a computational throughput close to 1 operation per cycle. In this paper, we present how from our hardware projection/backprojection pair, an analytic (3D-RP) and an iterative (3D-EM) reconstruction algorithms can be implemented on a System on Programmable Chip (SoPC). First, an hardware/software partitioning is done based on the different steps of each algorithm. Then the reconstruction system is composed of two hardware configurations of the programmable logic resources (FPGA). Each one corresponds mainly to the projection and backprojection step. Our projector/backprojector has been validated with a software 3D-RP and 3D-EM reconstruction on simulated PET-SORTEO data. A reconstruction time evaluation of these reconstruction systems are done based on the measured performances of our projectors IPs and the estimated performances of the additional simple hardware IPs. The expected reconstruction time is compared with the software tomography distribution STIR. A speed-up of 7 can be expected for the 3D-RP algorithm and a speed-up of 3.5 for the 3D-EM algorithm. For both algorithms, the architecture cycle efficiency expected is largely greater than the software implementation : 120 times for 3D-RP and 60 times for 3D-EM