System-level I/O power modeling | Zendy

W. Pinello | Zendy; Pari Patel | Zendy; Yuang-Liang Li | Zendy

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<title>System-level I/O power modeling</title>

Author(s) -

W. Pinello,

Pari Patel,

Yuang-Liang Li

Publication year - 2000

Publication title -

proceedings of spie, the international society for optical engineering/proceedings of spie

Language(s) - English

Resource type - Conference proceedings

SCImago Journal Rank - 0.192

H-Index - 176

eISSN - 1996-756X

pISSN - 0277-786X

DOI - 10.1117/12.404882

Subject(s) - flexibility (engineering) , computer science , power (physics) , electric power system , modeling and simulation , signal integrity , reliability engineering , engineering , simulation , printed circuit board , mathematics , operating system , statistics , physics , quantum mechanics

A methodology is proposed for the electrical characterization of electronic packages in a system-level environment. Modeling and simulation results show the capability of the method by demonstrating both power delivery and I/O signal integrity analysis in a unified environment. In addition to flexibility, the proposed method is capable of achieving accurate results in a fraction of the time as was previously required.

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