<title>Dynamic hardware video processing platform</title>
Author(s) -
Ray Andraka
Publication year - 1996
Publication title -
proceedings of spie, the international society for optical engineering/proceedings of spie
Language(s) - English
Resource type - Conference proceedings
SCImago Journal Rank - 0.192
H-Index - 176
eISSN - 1996-756X
pISSN - 0277-786X
DOI - 10.1117/12.255806
Subject(s) - computer science , control reconfiguration , image processing , frame rate , digital signal processing , computer hardware , flexibility (engineering) , frame (networking) , video processing , embedded system , digital image processing , image (mathematics) , real time computing , computer vision , telecommunications , statistics , mathematics
Image processing typically requires either a very low frame rate or a considerable amount of dedicated hardware to achieve satisfactory results. Further, custom algorithms often require development of the entire video capture and processing system. Reconfigurable logic can be used to realize a dynamically alterable image capture and processing system. Algorithm changes at the frame rate are made possible with high speed and partial reconfiguration. Partial reconfiguration permits common functions such as video timing and memory control to be kept in place while the custom processing algorithms are dynamically replaced or modified. The use of a common framework with application overlays also allows the designer to concentrate on the image processing algorithm instead of worrying about the background functions. The use of reconfigurable logic for image processing provides the flexibility of a general purpose DSP with the speed of dedicated hardware.
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