English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Tools annual

Global: Zendy Free Plan

Global: Zendy Tools monthly

Global: Zendy Plus monthly

In the past engineers have found ways of using defective parts. Some simple examples are LCD displays and memories used in answering machines. Here the defective parts lead to acceptable performance. For reconfigurable memories and FPGAs, defective circuitry is often avoided via reconfiguration-hence the resulting device appears to be defect-free.Current test techniques sort chips into two piles, namely good and bad. In high-end systems if a BIST test is executed while a system is in operation and a chip is faulty, the test will report only failure. If the system still performs acceptability, then system availability and survivability can be greatly enhanced if the quality of operation could be measured and used to decide on whether or not to abort.This panel will debate the following proposal: Some chips should be tested, either after fabrication if a low end unit, or in a system if a high end unit, and sorted into multiple categories based on their functional properties with respect to an application. Several issues will be discussed including related BIST techniques, test costs, economic models, and microprocessor and DSP applications. Pros and cons will be debated.

High End and Low End Applications for Defective Chips: Enhanced Availability and Acceptability