Is High Frequency Analog DFT Possible?

Design For Test (DFT) means altering a circuit design to make it more testable. DFT for high frequency (>lOO MHz) analog integrated circuits seems destined to be limited to looparound testing and other such end-to-end test methods. Any circuitry used to modify, monitor, or inject signals into the middle of such circuits inevitably impacts the function’s performance greatly much more than for low-frequency circuits. Most papers proposing general DFT methods do not discuss frequency limits to their approach. A panel discussion a.t VTS ‘94 addressed RF test strategies, and it was apparent that RF testing is a complex field (no’ pun intended), which could benefit from more DFT. Panelists from universities and industry will address their answers to the following questions: o Will improving the testability of HF analog circuits be limited to selection of the best stimulus and output anal:ysis, or is it practical to modify HF elements of an IC design to make it more testable? 0 Does the small number of transistors in typical HF analog circuits justify adding any internal test circuitry at all? 0 What are the frequency limits of existing analog DFT approaches (analog bus, reconfiguration, loop-around, etc.)? 214 O-8186-7304-4/96 $05.00