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C OSS Losses in 600 V GaN Power Semiconductors in Soft-Switched, High- and Very-High-Frequency Power Converters
Author(s) -
Grayson Zulauf,
Sanghyeon Park,
Wei Liang,
Kawin North Surakitbovorn,
Juan Rivas-Davila
Publication year - 2018
Publication title -
ieee transactions on power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.159
H-Index - 266
eISSN - 1941-0107
pISSN - 0885-8993
DOI - 10.1109/tpel.2018.2800533
Subject(s) - power, energy and industry applications , aerospace , communication, networking and broadcast technologies , components, circuits, devices and systems , computing and processing , engineered materials, dielectrics and plasmas , fields, waves and electromagnetics , general topics for engineers , nuclear engineering , signal processing and analysis , transportation
We report losses from charging and discharging the parasitic output capacitor, ${\rm C}_{\rm OSS}$ , in Gallium Nitride (GaN) power devices with voltage ratings over 600  ${\rm V}_{\rm DS}$ . These losses are of particular importance in soft-switched circuits used at MHz switching frequencies, where the output capacitance of the device is charged and discharged once per switching cycle during the device's off-time. This process is assumed lossless. We measure ${\rm C}_{\rm OSS}$ losses from 5–35 MHz sine, square, and Class- $\Phi _{2}$ waveshapes in enhancement-mode and cascode devices, and find that losses are present in all tested devices, equal or greater than conduction losses at MHz frequencies, and exponentially increasing with $\mathbf{dV/dt}$ . The cascode device outperforms the e-mode devices under 300 V, but the e-mode devices are preferred above this operating voltage. Furthermore, we show that, within a device family, losses scale linearly with output energy storage. Packaging appears to have only a minor effect on these losses. Finally, we demonstrate 10 MHz, 200 W dc–dc converters with varying device configurations, showing that, even with constant circulating currents, moving to larger devices with lower ${\rm R}_{\rm DS,ON}$ actually degrades efficiency in certain applications due to ${\rm C}_{\rm OSS}$ losses. In the high-voltage, high-frequency range, these reported losses must be optimized simultaneously with conduction losses on a per-application basis.

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