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Classifying Bad Chips and Ordering Test Sets
Author(s) -
Francois-Fabien Ferhani,
Edward J. McCluskey
Publication year - 2007
Publication title -
2006 ieee international test conference
Language(s) - English
Resource type - Conference proceedings
SCImago Journal Rank - 0.219
H-Index - 80
eISSN - 2378-2250
pISSN - 1089-3539
DOI - 10.1109/test.2006.297736
Subject(s) - components, circuits, devices and systems , signal processing and analysis , power, energy and industry applications
This paper shows data related to choosing a pair of test sets for Digital IC production test. This data demonstrates that the choice of the second set of the pair should take into account the test metric used for the first test set. An approach for making this choice by taking defect coverage and total test length into account is presented.

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