A Statistical Reliability Model for Single-Electron Threshold Logic

As one of the most promising candidates for future digital circuit applications, single-electron tunneling (SET) technology has been used to ensure further feature size reduction and ultralow power dissipation. However, this technology raises very serious concerns about reliable functioning, particularly due to random background charges and tight fabrication tolerances. Accurate evaluation of reliability for SET circuits has thus become a crucial step toward their reliability analysis and improvement. This brief proposes a statistical reliability model for SET logic gates, which takes into account the actual process variations and input probabilities. In particular, we study two typical SET logic gates (two-input nor and nand gates) for gate reliability evaluation. Instead of assuming a constant failure rate for logic gates as in most previous work, we show how logic inputs affect the reliability of the individual gates with discussions on the overall reliability of the system consisting of logic gates. This model can be used in future computer-aided design tools to estimate tunneling events, energy consumption, and reliability of SET-based digital logic circuits.