Hybrid Check Node Architectures for NB-LDPC Decoders | Zendy

Cédric Marchand | Zendy; Emmanuel Boutillon | Zendy; Hassan Harb | Zendy; Laura Conde-Canencia | Zendy; Ali Chamas Al Ghouwayel | Zendy

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Hybrid Check Node Architectures for NB-LDPC Decoders

Author(s) -

Cédric Marchand,

Emmanuel Boutillon,

Hassan Harb,

Laura Conde-Canencia,

Ali Chamas Al Ghouwayel

Publication year - 2018

Publication title -

ieee transactions on circuits and systems i regular papers

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.861

H-Index - 163

eISSN - 1558-0806

pISSN - 1549-8328

DOI - 10.1109/tcsi.2018.2866882

Subject(s) - low density parity check code , computer science , node (physics) , parallel computing , decoding methods , galois theory , degree (music) , binary number , parity bit , algorithm , arithmetic , mathematics , discrete mathematics , physics , structural engineering , acoustics , engineering

This paper proposes a unified framework to describe the check node architectures of non-binary low-density parity-check (NB-LDPC) decoders. Forward-backward, syndrome-based, and pre-sorting approaches are first described. Then, they are hybridized in an effective way to reduce the amount of computation required to perform a check node. This paper is specially impacting check nodes of high degrees ...

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