Skewed-Load Tests for Transition and Stuck-at Faults
Author(s) -
Irith Pomeranz
Publication year - 2019
Publication title -
ieee transactions on computer-aided design of integrated circuits and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.556
H-Index - 119
eISSN - 1937-4151
pISSN - 0278-0070
DOI - 10.1109/tcad.2018.2873233
Subject(s) - fault coverage , fault (geology) , benchmark (surveying) , stuck at fault , automatic test pattern generation , test set , reliability engineering , context (archaeology) , set (abstract data type) , fault detection and isolation , algorithm , computer science , engineering , electronic circuit , artificial intelligence , paleontology , electrical engineering , geodesy , seismology , geology , geography , actuator , biology , programming language
Test generation procedures target a variety of fault models in order to produce test sets that are effective for defect detection. This paper considers the likely scenario where two-cycle skewed-load tests are generated to detect single transition faults, and the test set is complemented with tests for single stuck-at faults that are not detected by the transition fault test set. For this scenario, this paper makes several unique observations that can be utilized to produce a single compact test set that consists only of two-cycle skewed-load tests for both fault models. The first observation is that a single-cycle test for a stuck-at fault can be transformed into a skewed-load test that is guaranteed to detect the stuck-at fault without performing logic or fault simulation. The second observation is that skewed-load tests, which are transformed from single-cycle tests for stuck-at faults, sometimes detect more transition and stuck-at faults than tests that were generated for transition faults. The third observation is that a static test compaction procedure, which is based on the modification and removal of tests, is effective in this context because it allows tests for stuck-at faults to detect more transition faults and vice versa. This paper describes a test compaction procedure based on these observations and presents experimental results for benchmark circuits to demonstrate the effectiveness of the procedure.
Accelerating Research
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom
Address
John Eccles HouseRobert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom