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Associative memory design for the FastTrack processor (FTK) at ATLAS
Author(s) -
A. Annovi,
M. Beretta,
E. Bossini,
F. Crescioli,
M. Dell'Orso,
P. Giannetti,
M. Piendibene,
I. Sacco,
L. Sartori,
R. Tripiccione
Publication year - 2011
Publication title -
2010 17th ieee-npss real time conference
Language(s) - English
Resource type - Conference proceedings
ISBN - 978-1-4244-7110-2
DOI - 10.1109/rtc.2010.5750451
Subject(s) - engineered materials, dielectrics and plasmas , nuclear engineering
We propose a new generation of VLSI processor for pattern recognition based on Associative Memory architecture, optimized for on-line track finding in high-energy physics experiments. We describe the architecture, the technology studies and the prototype design of a new R&D Associative Memory project: it maximizes the pattern density on ASICs, minimizes the power consumption and improves the functionality for the Fast Tracker (FTK) proposed to upgrade the ATLAS trigger at LHC. Finally we will focus on possible future applications inside and outside High Physics Energy (HEP).

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