Image Recognition Accelerator Design Using In-Memory Processing
Author(s) -
Yeseong Kim,
Mohsen Imani,
Tajana Rosing
Publication year - 2018
Publication title -
ieee micro
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.649
H-Index - 94
eISSN - 1937-4143
pISSN - 0272-1732
DOI - 10.1109/mm.2018.2889402
Subject(s) - computer science , cognitive neuroscience of visual object recognition , hardware acceleration , efficient energy use , overhead (engineering) , facial recognition system , computer hardware , key (lock) , image processing , embedded system , object (grammar) , artificial intelligence , image (mathematics) , pattern recognition (psychology) , field programmable gate array , operating system , electrical engineering , engineering
This paper proposes a hardware accelerator design, called object recognition and classification hardware accelerator on resistive devices, which processes object recognition tasks inside emerging nonvolatile memory. The in-memory processing dramatically lowers the overhead of data movement, improving overall system efficiency. The proposed design accelerates key subtasks of image recognition, incl...
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