Test strategies for nanometer technologies
Author(s) -
Sanjay Sengupta
Publication year - 2004
Publication title -
2004 international conferce on test
Language(s) - English
DOI - 10.1109/itc.2004.178
The trend toward bigger systems-on-a-chip means that the increase in die size alone add significant DPM, making the goal of double-digit DPM using current methods infeasible. To keep quality under control in nanometer processes, test must target delay defects, noise and process variation. Functional testing of high-performance parts continues to screen significant unique DPM on top of high coverage scan content. The at-speed tests result in heavy yield losses because they are applied in non-native mode, and could target functionally unsensitizable paths. In addition DFT supports reliable at-speed test application methods. With the proliferation of subtle defect types in nanometer processes, targeting defects directly is essential to contain test data volume. To target the defects stochastic process such as N-defect and BIST were used.
Accelerating Research
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom
Address
John Eccles HouseRobert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom