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Design of Mixed-Voltage Crystal Oscillator Circuit in Low-Voltage CMOS Technology
Author(s) -
Ming-Dou Ker,
Hung-Tai Liao
Publication year - 2007
Publication title -
2007 ieee international symposium on circuits and systems (iscas)
Language(s) - English
Resource type - Conference proceedings
eISSN - 2158-1525
pISSN - 0271-4302
DOI - 10.1109/iscas.2007.378207
Subject(s) - components, circuits, devices and systems , communication, networking and broadcast technologies , engineered materials, dielectrics and plasmas
In the nanometer-scale CMOS technology, the gateoxide thickness has been scaled down to support a higher operating speed under a lower power supply (1×VDD). However, the board-level voltage levels could be still in a higher voltage levels (2xVDD, or even more) for compatible to some earlier interface specifications in a microelectronics system. The I/O interface circuits have been designed with consideration on the gate-oxide reliability in such mixed-voltage applications. In this work, a new mixed-voltage crystal oscillator circuit realized with low-voltage CMOS devices is proposed without suffering the gate-oxide reliability issue. The proposed mixed-voltage crystal oscillator circuit, which is one of the key I/O cells in a cell library, has been designed and verified in a 90-nm 1-V CMOS process to serve 1/1.8-V mixed-voltage interface applications.

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