A Novel Active Decoupling Capacitor Design in 90nm CMOS | Zendy

Xiongfei Meng | Zendy; Karim Arabi | Zendy; Resve Saleh | Zendy

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A Novel Active Decoupling Capacitor Design in 90nm CMOS

Author(s) -

Xiongfei Meng,

Karim Arabi,

Resve Saleh

Publication year - 2007

Publication title -

2007 ieee international symposium on circuits and systems (iscas)

Language(s) - English

Resource type - Conference proceedings

eISSN - 2158-1525

pISSN - 0271-4302

DOI - 10.1109/iscas.2007.377894

Subject(s) - components, circuits, devices and systems , communication, networking and broadcast technologies , engineered materials, dielectrics and plasmas

On-chip decoupling capacitors (decaps) are generally used to reduce power supply noise. Passive decap designs are reaching their limits in 90nm CMOS technology due to higher operating frequency, lower supply voltage, increased concerns on electrostatic discharge (ESD) reliability and thin-oxide gate leakage. In this paper, a novel active decap design is proposed to provide better noise reduction than the passive decaps. The active decap is analyzed for ESD reliability and process/temperature variation adaptability. It is implemented in a 1.0V-core 90nm process with a total area of 0.168mm2 and standby power of 3.0mW.

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