On combining fault classification and error propagation analysis in RT-Level dependability evaluation

Early analysis of the functional impact of faults aims either at classifying the faults according to their main potential effect, or at analyzing more in depth the error propagation paths in the circuit. This paper presents the results of extensive SEU-like fault injections performed on a VHDL model of the 8051 micro-controller. The advantage of combining the two types of analyses and the impact of the workload are discussed.