Variability driven gate sizing for binning yield optimization
Author(s) -
Azadeh Davoodi,
Ankur Srivastava
Publication year - 2006
Publication title -
proceedings - acm ieee design automation conference
Language(s) - Uncategorized
Resource type - Conference proceedings
SCImago Journal Rank - 0.518
H-Index - 119
ISSN - 0738-100X
DOI - 10.1109/dac.2006.229419
Subject(s) - sizing , sensitivity (control systems) , overhead (engineering) , computer science , speedup , yield (engineering) , constraint (computer aided design) , process (computing) , algorithm , mathematical optimization , mathematics , electronic engineering , parallel computing , engineering , materials science , art , geometry , metallurgy , visual arts , operating system
Accelerating Research
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom
Address
John Eccles HouseRobert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom