z-logo
open-access-imgOpen Access
Single Event Transient Study of pMOS Transistors in 65 nm Technology With and Without a Deep n+ Well Under Particle Striking
Author(s) -
Jizuo Zhang,
Liang Fang,
Jianjun Chen,
Shen Hou,
Xianyu Tong
Publication year - 2019
Publication title -
ieee access
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.587
H-Index - 127
ISSN - 2169-3536
DOI - 10.1109/access.2019.2946213
Subject(s) - transistor , pmos logic , transient (computer programming) , nmos logic , mosfet , materials science , physics , optoelectronics , electronic engineering , computer science , voltage , engineering , quantum mechanics , operating system
In triple-well PMOSFET transistor, a deep n+ well (DNW) is a process used to isolate the substrate noise, which can lead to changes in effect of single event transient (SET). In outer space, collision of cosmic energetic particles with sensitive nodes of integrated circuits can generate electron-hole pairs. The probability of recombination of electrons and holes is different, which results in transient changes of sensitive nodes’ state. Transient potential change is transmitted to the output terminal, that is, a single event transient. In this paper, measured SET effect characteristics of PMOSFET transistors in 65 nm process are performed with heavy particle experiments. Compared with triple-well PMOSFET transistor, the experimental data show that the average of SET pulse width in double-well PMOSFET is increased by 19.4% (Ge linear energy transfer (LET) = 37.4 MeV $\cdot $ cm2/mg) and 14.4% (Ti LET = 22.2 MeV $\cdot $ cm2/mg). The data show that a triple-well PMOSFET transistor is better for SET, which is be appropriate for radiation hardened integrated circuits (ICs) design.

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here
Accelerating Research

Address

John Eccles House
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom