Novel Integrated Class F Power Amplifier Design for RF Power Infrastructure Applications

This paper presents a comprehensive study of the impact of resistive harmonic loading on the design of integrated Class-F power amplifiers (PAs). The proposed time-domain waveform-based analysis allows for an evaluation of the performance of Class-F PAs while controlling both second and third harmonics simultaneously. The voltage mapping is presented to include the impact of the resistive second harmonic impedance in the design of Class-F PAs. Besides, drain current formulations as a function of conduction angle are used to evaluate the harmonic coefficients under the impact of resistive third harmonic impedance. As such, the combination of resistive second and third harmonics is modeled to study its impact on efficiency and optimum impedance in the Class-F PAs. For practical validation, the derived knowledge is applied to propose a novel integrated Class-F PA that absorbs the output capacitance into the match while maintaining a purely resistive load at the fundamental frequency. The output match is fabricated on a highly integrated NXP Laterally Diffused MOSFET (LDMOS) process. At 1.8 GHz, using NXP 5-mm LDMOS die, the integrated Class-F achieves a drain efficiency ranging from 52% to 61% at 5-W output power based on two different design topologies. Both prototypes demonstrate excellent isolation at the second and third harmonics. Measurement results confirm the theoretical framework reported in this paper.