Optimal Card Design for Non-Linear HF RFID Integrated Circuits With Guaranteed Standard-Compliance

The state-of-the-art design criteria for High Frequency (HF) Radio Frequency IDentification (RFID) cards at 13.56 MHz depend on the choice of a resonance frequency and a quality factor of the card. Our investigations show that these values are a result of the Integrated Circuit (IC)'s non-linearity and its dynamic range. We describe our accurate method for calculating the IC's circuit model during loaded and unloaded states. The dynamic range is identified where the IC is capable of achieving load modulation for all basic bit rates (106-848 kbit/s). The calculated IC's circuit model is simulated and compared to measurements showing good agreement. We formulate a constrained minimization problem based on the IC's circuit model, its dynamic range, including the entire card's parasitics, as well as loading effects from the reader side. The problem's solution is the optimum inductance for the card's coil that renders a standard-compliant HF RFID card. A prototype card is manufactured based on the optimum inductance and we show that it passes the standardized tests and operates for all basic bit rates within the field intensity range from 1.5 to 7.5 A/m, as specified.